The use of optical interconnects for silicon integrated circuits has been employed heretofore to take advantage of the greater capacity of optoelectronics for communications while retaining the computational advantages of silicon electronics. For example, as disclosed in K. W. Goossen et al., "Photonics in Switching Technical Digest," Palm Springs, Calif. 1993 p. 50, GaAs multiple quantum well (MQW) light modulators have been successfully grown directly on silicon and subsequently interconnected electrically to pre-existing silicon integrated circuits. This development has the potential to open up two new important technological applications for III-V photonics. First, the integration of the GaAs light modulators on silicon can form the basis of a smart pixel element, which when fabricated into large arrays are capable of processing huge amounts of information in parallel at terabit speeds for photonic switching. Second, a GaAs light modulator on silicon also may be employed to alleviate input-output bottle necks to high density integrated circuits by means of free space interchip optical communication.
An important issue in the heteroepitaxial growth of III-V compounds such as GaAs on a silicon substrate is the preparation of the silicon surface. For example, native silicon oxides on the surface must be removed prior to growth. It is known that these oxides can be desorbed by heating the substrate in ultrahigh vacuum at a temperature of 825.degree.-900.degree. C. However, this temperature is too high for the successful fabrication of silicon-based integrated circuits since desorption in this temperature range causes the substrate to absorb too much heat. In fact, the amount of heat absorbed is comparable to the total thermal budget of the processing steps typically employed to produce such integrated circuits. Accordingly, desorption at these elevated temperatures will likely produce a low yield of silicon-based integrated circuits.
Another known desorption method involves the application of hydrogen plasma to the silicon surface by a technique such as electron cyclotron resonance (ECR). In this method the plasma etches the silicon surface and the process is continued until all of the oxide layers are removed and a clean silicon surface remains. An example of such an etching process is disclosed in Y. Kunitsugu et al., J. Crystal Growth, 95, 91 (1989). However, this known desorption method has a deleterious effect on the quality of the silicon surface which adversely effects III-V heteroepitaxial growth. In particular, it has been shown that high quality epitaxial growth of GaAs on silicon requires a silicon surface that has a high degree of bilayer step ordering. The plasma etching process reduces this ordering and produces faceting on the exposed silicon surface.